This invention relates to charge-coupled devices and, more particularly, relates to a structure which tends to minimize leakage between adjacent electrodes in a charge-coupled device.
For efficient transfer of carriers in charge-coupled devices, it is known that the channel potential must be controlled in the regions between adjacent gate electrodes. This control may be achieved by utilizing overlapping gate structures with two layers of conductive materials. For simplicity of fabrication, however, it is sometimes desirable to utilize nonoverlapping gate structures. For nonoverlapped gate structures, the channel potential between adjacent gate electrodes may be controlled by utilizing a resistive gate structure as disclosed in U.S. Pat. No. 3,728,590, issued to Kim et al and assigned to the same assignee as this application, and as disclosed in "p-channel Charge Coupled Devices with Resistive Gate Structures," Appl. Phys. Lets., USA, Vol. 20, No. 12, pp. 514-516, June 15, 1972.
It has been found, however, that interelectrode material is subject to field-modulated interelectrode conductance. In effect, a series of conductor-insulator-semiconductor (MIS) transistors is formed with the substrate acting as a gate and the electrodes acting as sources and drains. Field-modulated interelectrode conductance has been found for standard charge-coupled structures as well as for the buried-channel structures disclosed in U.S. Pat. No. 3,739,140, issued to R. H. Krambeck.